1. Field of the Invention
The present invention relates to a filtering apparatus and a semiconductor apparatus having the same, and in particular, relates to the filtering apparatus which detects and corrects a variation of CR-product, which is a product of a resistance value of a resistor and a capacitance value of a capacitor, that determines frequency characteristics of the filtering apparatus in response to each of a plurality of reference signals having different frequencies from each other, and the semiconductor apparatus having the same.
2. Description of the Related Art
In recent years, in a mobile communication apparatus and the like, a filtering apparatus has high tendency to be built into a semiconductor apparatus in order to meet the increasing demand of reduction in size. In the filtering apparatus built in the semiconductor apparatus, a product of variation in absolute value peculiar to a semiconductor process generated in each of a resistor and a capacitor which configure the filtering apparatus, a so-called CR-product varies; and therefore, a variation of CR-product is generated in frequency characteristics of the filtering apparatus. Therefore, it is necessary to correct the variation of frequency characteristics of the filtering apparatus by detecting the variation of the CR-product.
FIG. 13 is a block diagram showing a configuration of a filtering apparatus according to a prior art. Referring to FIG. 13, the filtering apparatus according to the prior art includes a frequency divider 1, a reference filter 2A, a delay time detector 3, a counter 4, a switch selection controller 5, a main filter 6 and an oscillator 55. The reference filter 2A includes resistors 21 and 23, capacitors 26 and 27, and an amplifier 30. The main filter 6 includes resistors 61, 62 and 63, switches 65 to 67 respectively selecting resistors 61 to 63, and a capacitor 68.
Referring to FIG. 13, a reference signal Sa generated and outputted by the oscillator 55 is inputted to the frequency divider 1 and the counter 4. The reference signal Sa inputted to the frequency divider 1 is frequency-divided by twelve by the frequency divider 1. The reference signal Sa is then outputted to the reference filter 2A and the delay time detector 3 as a frequency-divided signal Sb. The frequency-divided signal Sb inputted to the reference filter 2A is outputted to the delay time detector 3 as a reference filter output signal Sc by delaying by a group delay time determined by an absolute value of the resistors 21 and 23 and the capacitors 26 and 27 which configure the reference filter 2A. The delay time detector 3 detects a delay time of the reference filter output signal Sc from the reference filter 2A for the frequency-divided signal Sb from the frequency divider 1, and outputs the detected delay time as a detection signal Sd of a high level time interval. At this time, since the reference filter output signal Sc is outputted delayed from the frequency-divided signal Sb by the group delay time of the reference filter 2A, the detection signal Sd outputted from the delay time detector 3 becomes a signal corresponding to a CR-product of the resistors 21 and 23 and capacitors 26 and 27 which configure the reference filter 2A. The counter 4 counts that the high level time interval of the detection signal Sd from the delay time detector 3 is how many times as long as the time cycle of the reference signal Sa, and outputs a counter output signal Se indicating a counted value. Since the high level time interval of the detection signal Sd corresponds to the CR-product of the reference filter 2A, the counter output signal Se also becomes a signal corresponding to the CR-product of the reference filter 2A. The switch selection controller 5 outputs switch selection signals Sf5, Sf6 and Sf7, respectively controlling the switches 65 to 67 of the main filter 6 in response to the value of the inputted counter output signal Se.
In the filtering apparatus according to the prior art shown in FIG. 13, an operation for correcting the variation of frequency characteristics of the main filter 6 in response to the variation of the CR-product of the reference filter 2 will be described with reference to FIG. 13 to FIG. 16. FIGS. 14, 15, and 16 are timing charts showing signals of respective sections where the variation of the CR-product of the reference filter 2 in the filtering apparatus of FIG. 13 are −10%, 0% and 10%, respectively. Further, “the variation of the CR-product being 0%” indicates that the CR-product is equal to a standard value.
As shown in FIG. 14 to FIG. 16, with an increase of the variation of the CR-product of the reference filter 2 in the order of −10%, 0% and +10%, the delay time of the reference filter output signal Sc for the frequency-divided signal Sb changes, and the high level time interval of the detection signal Sd of the delay time detector 3 becomes longer. The counter 4 counts that the high level time interval of the detection signal Sd is how many times as long as the time cycle of the inputted reference signal Sa, and outputs the counter output signal Se. Therefore, the counted value of the counter 4 increases with the increase of the variation of the CR-product of the reference filter 2 in the order of −10%, 0% and +10%; and consequently, the maximum value of the counter output signal Se also increases. As shown in FIG. 14 to FIG. 16, with the increase of the variation of the CR-product in the order of −10%, 0% and +10%, the maximum value of the counter output signal Se becomes “5,” “6” and “7”, respectively. Thus the variation of the CR-product of the reference filter 2 is detected.
The switch selection controller 5 outputs the switch selection signals Sf5 to Sf7 for controlling the switches 65 to 67, respectively, so that only the switch 65 is turned on among the three switches 65, 66 and 67 of the main filter 6 when the maximum value of the counter output signal Se is “5”; only the switch 66 is turned on among the three switches 65, 66 and 67 of the main filter 6 when the maximum value of the counter output signal Se is “6”; and only the switch 67 is turned on among the three switches 65, 66 and 67 of the main filter 6 when the maximum value of the counter output signal Se is “7.”
In the main filter 6, a resistance value of the resistor 61 is set so as to be larger by 11.1% than that of the resistor 62, and a resistance value of the resistor 63 is set so as to be smaller by 9.1% than that of the resistor 62. Thus the frequency characteristics of the main filter 6 are corrected in response to the detected variation of CR-product of the reference filter 2.
Specifically, for example, when the CR-product of the reference filter 2A is not varied, that is, when the variation of the CR-product of the reference filter 2A is 0%, the maximum value of the counter output signal Se becomes “6” as shown in FIG. 15; and only the switch 66 of the main filter 6 is controlled to be turned on by the switch selection controller 5, and the resistor 62 is selected.
When the variation of the CR-product of the reference filter 2A is −10%, the delay time at the reference filter 2A becomes shorter; therefore, the maximum value of the counter output signal Se becomes “5” as shown in FIG. 14, and the switch 65 of the main filter 6 is controlled to be turned on by the switch selection controller 5. Thus the resistor 61 having the resistance value larger by 11.1% than that of the resistor 62 is selected. Therefore, as compared with the case that the variation of the CR-product of the reference filter 2A is 0%, the CR-product of the main filter 6 has a magnification given by the following equation (1), and becomes almost the same value as compared with the case that the variation of the CR-product of the reference filter 2A is 0%. That is, even if the CR-product of the reference filter 2A varies, the switches 65 to 67 of the main filter 6 are controlled by the switch selection controller 5 to be corrected to an appropriate resistance value; and therefore, the frequency characteristics of the main filter 6 are not changed.{(100−10)/100}×{(100+11.1)/100}=0.9999  (1)
When the variation of the CR-product of the reference filter 2A is 10%, the delay time at the reference filter 2A becomes longer. Therefore, the maximum value of the counter output signal Se becomes “7” as shown in FIG. 16, and the switch 67 of the main filter 6 is controlled to be turned on by the switch selection controller 5; and the resistor 63 having the resistance value smaller by 9.1% than that of the resistor 62 is selected. Therefore, as compared with the case that the variation of the CR-product of the reference filter 2A is 0%, the CR-product of the main filter 6 has a magnification given by the following equation (2), and becomes almost the same value as compared with the case the case that the variation of the CR-product of the reference filter 2A is 0%. That is, even if the CR-product of the reference filter 2A varies, the switches 65 to 67 of the main filter 6 are controlled by the switch selection controller 5 to be corrected to an appropriate resistance value. Therefore, the frequency characteristics of the main filter 6 are not changed.{(100+10)/100}×{(100−9.1)/100}=0.9999  (2)
As described above, the filtering apparatus according to the prior art detects the variation of the CR-product, and corrects the variation of frequency characteristics of the filtering apparatus.
Further, there is disclosed Japanese Patent Laid-open Publication No. 2004-172911 as a patent document related to the present invention.
However, a method of detecting the variation of the CR-product in the filtering apparatus according to the prior art is to count by the counter 4 that the high level time interval of the detection signal Sd corresponding to the CR-product is how many times as long as the time cycle of the reference signal Sa. Therefore, there is a problem in that, when the frequency of the reference signal Sa changes, the variation of the CR-product cannot be correctly detected, and the variation of frequency characteristics of the filtering apparatus cannot be accurately corrected.
In this case, an operation of the filtering apparatus in the case where the CR-product is the same and the frequency of the reference signal Sa is different from each other will be described with reference to FIGS. 17 and 18. FIG. 17 is a timing chart showing signals of respective sections in the case where the frequency of the reference signal Sa is a frequency f1 in the filtering apparatus of FIG. 13. FIG. 18 is a timing chart showing signals of respective sections in the case where the frequency of the reference signal Sa is 1.5 times as high as the frequency f1 in the filtering apparatus of FIG. 13.
In FIGS. 17 and 18, when the frequency of the reference signal Sa is different from each other, the frequency of the frequency-divided signal Sb is also different. However, since the delay time of the reference filter 2A is determined by the absolute value of the resistors 21 and 23 and the capacitors 26 and 27, the delay time of the reference filter output signal Sc for the frequency-divided signal Sb is not changed when the CR-product of the reference filter 2A is the same. Therefore, the high level time interval of the detection signal Sd from the delay time detector 3 is not changed. The counter 4 counts that the high level time interval of the detection signal Sd is how many times as long as the time cycle of the reference signal Sa. Therefore, when the frequency of the reference signal Sa varies, the counter output signal Se detected by the counter 4 changes depending on the frequency of the reference signal Sa.
As shown in FIG. 17, when the frequency of the reference signal Sa is the frequency f1, the maximum value of the counter output signal Se is “6”. However, as shown in FIG. 18, when the frequency of the reference signal Sa is 1.5 times as high as the frequency f1, the maximum value of the counter output signal Se becomes “9.” The switch selection controller 5 controls the switches of the main filter 6 in response to the value of the inputted counter output signal Se. Therefore, if the counter output signal Se is changed, a different resistor is selected in the main filter 6, and as a result, the frequency characteristics of the main filter 6 are changed.
As described above, in the filtering apparatus according to the above prior art, when the frequency of the reference signal Sa is changed, for example, when a plurality of the reference signals Sa are used, the variation of the CR-product of the reference filter 2A cannot be correctly detected. Therefore, a resistor which is not optimum for the variation of the CR-product of the reference filter 2A is selected in the main filter 6; and consequently, the variation of frequency characteristics of the main filter 6 cannot be accurately corrected.